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Static Storage

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USPTO Class 365 - Static information storage and retrieval
Updated: 20 hours 28 min ago

Content addressable memory cells and ternary content addressable memory cells

Mon, 12/22/2014 - 1:45pm
An embodiment of the invention provides a binary CAM cell. The binary CAM cell includes a storage circuit, a first discharging circuit, and a second discharging circuit. The storage circuit is configured to provide a first stored bit and a second stored bit, which are complimentary bits of each other....
Categories: Computers

Memory device

Mon, 12/22/2014 - 1:45pm
According to one embodiment, a memory device includes first to third interconnects, memory cells, and selectors. The first to third interconnects are provided along first to third directions, respectively. The memory cells includes variable resistance layers formed on two side surfaces, facing each other in the first direction, of the...
Categories: Computers

Generating output signal during read operation

Mon, 12/22/2014 - 1:45pm
A circuit includes a fuse cell, a sense circuit and an output control circuit. The fuse cell includes an electrical fuse. The sense circuit is electrically coupled to the fuse cell and configured for generating a sense signal indicative of a programmed condition of the electrical fuse, at an output...
Categories: Computers

Semiconductor device with fuse array and operating method thereof

Mon, 12/22/2014 - 1:45pm
A semiconductor device includes a fuse array for storing normal fuse data and pattern data through a programming operation, a boot-up control unit suitable for generating an enable signal for enabling an output of the pattern data, and a pattern detection unit suitable for detecting a pattern of the pattern...
Categories: Computers

Structures for resistance random access memory and methods of forming the same

Mon, 12/22/2014 - 1:45pm
Memory cells and methods of forming the same and devices including the same. The memory cells have first and second electrodes. An amorphous semiconductor material capable of electronic switching and having a first band gap is between the first and second electrodes. A material is in contact with the semiconductor...
Categories: Computers

System and a method for designing a hybrid memory cell with memristor and complementary metal-oxide semiconductor

Mon, 12/22/2014 - 1:45pm
The embodiments herein relates to a hybrid non-volatile memory cell system and architecture for designing integrated circuits. The system comprises CMOS access transistor connected to a memristor which stores a data based on a resistance. The system has a word line for accessing the hybrid memory and two bit lines...
Categories: Computers

Semiconductor memory device and memory system including the same

Mon, 12/22/2014 - 1:45pm
A semiconductor memory device includes a plurality of word lines each of which are connected to a plurality of memory cells, a row control unit suitable for sequentially activating and precharging a word line corresponding to a target address and a predetermined (N) number of adjacent word lines during a...
Categories: Computers

Semiconductor memory device and method for driving the same

Mon, 12/22/2014 - 1:45pm
In a conventional DRAM, when the capacitance of a capacitor is reduced, an error of reading data easily occurs. A plurality of cells are connected to one bit line MBL_m. Each cell includes a sub bit line SBL_n_m and 4 to 64 memory cells (a memory cell CL_n_m—1 or the...
Categories: Computers

Semiconductor memory device and semiconductor package

Mon, 12/22/2014 - 1:45pm
A semiconductor memory device includes: a memory unit including a first memory sub region including a first memory cell and a second memory sub region including a second memory cell; a temperature information obtaining unit that obtains temperature information; a temperature estimation unit that estimates a first temperature of the...
Categories: Computers

Semiconductor memory

Mon, 12/22/2014 - 1:45pm
A semiconductor memory is disclosed that includes a first data line, a second data line, a first coupling line and a second coupling line. The first coupling line is configured to capacitively couple the first coupling line with the first data line. The second coupling line is configured to capacitively...
Categories: Computers

Phase-change memory cells

Mon, 12/22/2014 - 1:45pm
A phase-change memory cell for storing information in a plurality of programmable cell states. The memory cell includes: a phase-change material located between a first electrode and a second electrode for applying a read voltage to the phase-change material to read a programmed cell state; and an electrically-conductive component extending...
Categories: Computers

Phase-change memory cells

Mon, 12/22/2014 - 1:45pm
Improved phase-change memory cells are provided for storing information in a plurality of programmable cell states. A phase-change material is located between first and second electrodes for applying a read voltage to the phase-change material to read the programmed cell state. An electrically-conductive component extends from one electrode to the...
Categories: Computers

Semiconductor device, method for fabricating the same, and memory system including the semiconductor device

Mon, 12/22/2014 - 1:45pm
Semiconductor device, method for fabricating the same and electronic devices including the semiconductor device are provided. The semiconductor device comprises an interlayer insulating layer formed on a substrate and including a trench, a gate electrode formed in the trench, a first gate spacer formed on a side wall of the...
Categories: Computers

Multiple step programming in a memory device

Mon, 12/22/2014 - 1:45pm
Method of operating a memory include programming a memory cell and reading the memory cell to determine a programmed threshold voltage of the memory cell. If the programmed threshold voltage is within a threshold voltage distribution of a plurality of threshold voltage distributions, the memory cell is reprogrammed, and if...
Categories: Computers

Shielded vertically stacked data line architecture for memory

Mon, 12/22/2014 - 1:45pm
Apparatuses and methods are disclosed, including an apparatus that includes first and second strings of vertically stacked memory cells, and first and second pluralities of vertically stacked data lines. A data line of the first plurality of data lines is coupled to the first string through a first select device....
Categories: Computers

Configuring storage cells

Mon, 12/22/2014 - 1:45pm
Apparatuses, systems, methods, and computer program products are disclosed for configuring storage cells. A method includes determining a usage history for a set of storage cells of a solid-state storage medium. A method includes adjusting a voltage threshold for a set of storage cells by an amount based at least...
Categories: Computers

Compact memory device including a sram memory plane and a non volatile memory plane, and operating methods

Mon, 12/22/2014 - 1:45pm
A memory device includes a memory cell with an elementary SRAM-type cell and an elementary module coupled between a supply terminal and the elementary SRAM-type cell. The elementary module has a single nonvolatile EEPROM elementary memory cell that includes a floating gate transistor. The elementary module also has a controllable...
Categories: Computers

Memory device including a sram memory plane and a non volatile memory plane, and operating methods

Mon, 12/22/2014 - 1:45pm
A memory device includes at least one memory cell having a first SRAM-type elementary memory cell having two inverters coupled to one another crosswise and two groups, each having at least one non-volatile elementary memory cell. The non-volatile elementary memory cells of the two groups are coupled firstly to a...
Categories: Computers

Memory systems including nonvolatile memory devices and dynamic access methods thereof

Mon, 12/22/2014 - 1:45pm
A method of operating a memory device includes: determining an erase mode based on a number of erase cycles performed on a memory block and an erase voltage utilized to perform each erase cycle; and setting an erase voltage level for executing an erase operation on the memory block based...
Categories: Computers

Pseudo block operation mode in 3d nand

Mon, 12/22/2014 - 1:45pm
A 3D NAND stacked non-volatile memory device, comprising: a string comprising a plurality of non-volatile storage elements, the string comprises a channel and extends vertically through layers of the 3D stacked non-volatile memory device, and the plurality of storage elements are subdivided into different groups based on group assignments, each...
Categories: Computers