SANTA CLARA, Calif. -- (BUSINESS WIRE) -- ATopTech, the leader in next generation physical design solutions, was awarded the TSMC Open Innovation Platform® (OIP) Partner of the Year Award 2013 for Joint Development of 16FinFET Design Infrastructure. ATopTech’s Aprisa™ and Apogee™, the company’s place and route tools, have proven to help customers realize the benefits of TSMC’s 16nm FinFET technology: improved design performance, lower overall power consumption, and smaller area.
As announced on September 30th, TSMC and ATopTech collaborated to validate the ATopTech physical implementation tools for 16FinFET technologies. Joint customers can now request Aprisa/Apogee Technology Files for 16FinFET directly from TSMC, helping to speed design starts and enabling smooth adoption and design success.
Aprisa and Apogee have been applied in TSMC’s 16nm FinFET Reference Flow using an ARM Cortex™-A15 quad-core processor as a validation vehicle. The key features supported by ATopTech’s Aprisa and Apogee are:
“It has been an honor to collaborate with TSMC on the 16nm FinFET Reference Flow and to ensure that joint customers enjoy the highest possible routability for 16nm designs,” said Jue-Hsien Chern, CEO of ATopTech. “We are proud to receive this award in recognition of the value of our physical implementation technology, which is architected specifically for advanced technology design at lower geometries to optimize performance, power and area.”
ATopTech, Inc. is the technology leader in IC physical design. ATopTech’s technology offers the fastest time to design closure focused on advanced technology nodes. The use of state-of-the-art multi-threading and distributed processing technologies speeds up the design process, resulting in unsurpassed project completion times. For more information, see www.atoptech.com.
Aprisa and Apogee are trademarks and ATopTech is a registered trademark of ATopTech, Inc. Any other trademarks or trade names mentioned are the property of their respective owners.