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Concept Engineering Introduces S-engine: Automatic System-level Schematic Generation Capabilities Combined with IP Editing and Assembly

Companies mentioned in this article: Concept Engineering

FREIBURG, Germany -- (BUSINESS WIRE) -- In 2010, Concept Engineering significantly improved transistor-level visualization for electronic design automation (EDA) tools in their NlView Widget platform with the introduction of T-engine™. This year, the company introduces S-engine™, which provides enhanced, automatic schematic generation that allows visualization at higher levels of abstraction. S-engine moves the Nlview Widget platform beyond visualization by providing smart editing capabilities at the system level, which makes it possible for developers to create tools for automated intellectual property (IP) and system-on-chip (SoC) assembly.

When integrated into high-level synthesis tools, S-engine provides excellent control over and visibility into the synthesis process. At the same time, S-engine’s automatic schematic generation allows visualization at higher levels of abstraction, such as interface connections and intelligent IP-on-the-fly management, to easily handle configurable IP building blocks. Smart editing capabilities allow the creation of new and innovative SoC, network-on-chip (NoC) and IP design tools.

S-Engine’s combination of visualization and editing features enables system designers to rapidly instantiate, configure and connect the design elements that form complex SoCs. With support for higher levels of abstraction, S-engine can be used to create tools that visualize system descriptions derived from SystemC, SystemVerilog or other high-level description languages. For additional information, see the S-engine datasheet at http://www.concept.de/datasheet_sengine.pdf

“As design complexity continues to grow and design teams use more and more in-house or third-party IP as part of their SoC, NoC or IP creation, the need for visualization and design technology at the IP level and system level becomes increasingly important,” said Gerhard Angst, CEO and president of Concept Engineering. “Combining system-level schematic generation capabilities with IP editing and assembly features gives our customers exciting new options to create tools for system exploration and system definition.”

S-engine and additional software components for EDA tool developers will be demonstrated in the Concept Engineering booth (#1201) at the 51st DAC in Moscone Center, San Francisco, from June 2nd to 4th, 2014.

About Concept Engineering

Concept Engineering is a privately-held company based in Freiburg, Germany, that provides visualization and debugging technology for electronic circuits and systems, including automatic schematic generation technology for all major design levels. The company’s technology helps electronic design engineers to easily understand, debug, optimize and document electronic designs. Concept Engineering’s software technology is used in many fields in the EDA market, including: RTL development, IP reuse, ASIC and SoC design, FPGA design, analog/ mixed-signal design, logic synthesis, design verification, test automation, post-layout analysis, debugging and visualization at system level, RTL level, netlist level and transistor level.

SpiceVision PRO, GateVision PRO, RTLvision PRO and StarVision PRO are registered trademarks and Nlview, T-engine and S-engine are trademarks of Concept Engineering GmbH. in the United States and other countries. All other trademarks are property of their respective owners.


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Contact:

for Concept Engineering in North America:
Cayenne Communication LLC
Michelle Clancy, +1-252-940-0981
michelle.clancy@cayennecom.com