SANTA CLARA, Calif. -- (BUSINESS WIRE) -- Invarian, Inc., provider of block-level to full-chip power analysis solutions for electronic design automation (EDA), will release version 3.0 of the company’s concurrent power and EM/IR validation solution for large capacity designs in booth #706 at the 2014 Design Automation Conference (DAC). InVarTM 3.0 is a TSMC-certified power estimation and validation solution used throughout the flow. DAC 2014 runs from June 1 to June 5 at the Moscone Center in San Francisco, CA.
InVar solutions tackle analog and digital designs with concurrent analysis of power, EM/IR, signal timing, and temperature. Advanced algorithms enable sign-off with real life measurement accuracy. InVar 3.0, demonstrated for the first time at DAC 2014, is 3-4x faster than previous version without sacrificing physical lab accuracy. InVar also now supports electrostatic discharge (ESD). SPICE-level accuracy of results are best in class at 16nm, 20nm, and 28nm. Invarian is certified by TSMC for several process nodes including 16nm FinFET Power and EM/IR.
“Customers are finding InVar ideally suited for power estimates that can vastly improve the accuracy of an RTL-through-to-layout flow,” said Jens Andersen, CEO of Invarian. “Our tool is ideal for SPICE co-simulations of analog designs where EM/IR is of concern. For digital designs, we incorporate a number of techniques to speed the analysis while maintaining SPICE-level accuracy. This has major benefits when incorporated through feedback loops to leverage existing optimized flows with just plain simple better data.”
To see live demonstrations, get details on InVar 3.0, or to set an appointment at DAC with Invarian staff, go to www.Invarian.com
About Invarian and Invar
Invarian is revolutionizing block-level to full-chip sign-off analysis for complex, high-performance integrated circuits (ICs). Invar consists of a new era methodology using parallel architecture and concurrent power-voltage-thermal analysis to provide engineers with fast, accurate, consistent results from gate level through the 3D package environment. The accuracy of Invarian sign-off analysis for analog, digital and mixed-signal ICs identifies post-manufacturing failures before tape-out, reducing costly re-spins. Customers are using this cost-effective, comprehensive solution to develop digital and analog/mixed-signal chips in areas such as mobile technology, CPUs, wireless and networking, and for a variety of processes including TSMC-certified 16nm. For more information visit www.Invarian.com
InVar Pioneer Power, InVar Pioneer EM/IR, InVar Pioneer Thermal, InVar Pioneer Macro Modeling and InVar 3D Frontier Platform are trademarks of Invarian, Inc. Any other trademarks or trade names mentioned are the property of their respective owners.